Building Asynchronous Circuits with JBits

Asynchronous logic design has been around for decades. However, only recently has it gained any commercial success. Research has focused on a wide variety of uses, from microprocessor design to low power circuits. The fact that design tools and designer experience are geared more towards synchronous circuit design has limited the acceptance and popularity of asynchronous design. The JBits API provides low level access to the configuration of resources in a Xilinx FPGA. Because of the control given to the user, the JBits API is an ideal design environment for implementing asynchronous circuits on mainstream FPGAs. An asynchronous full adder was implemented on a Virtex FPGA. The design of the circuit is described as well as modifications to the design tools to simplify asynchronous circuit specification.